Project description
Current Activities
Terabit/s Switch Prototype
Seminars and Publications
Meetings and Events


D. Agrawal, M. Baldi, M. Corrà, G. Fontana, G. Marchetto, V. T. Nguyen, Y. Ofek, D. Severina, T. H. Truong, O. Zadedyurina, "Scalable Switching Testbed not "Stopping" the Serial Bit Stream," ICC 2007 - The IEEE International Conference on Communications 2007, Glasgow, Scotland, 24-28 June 2007.

In order to achieve ultra scalable IP packet switching it is essential to minimize “stopping” of the serial bit streams. In our recent experimental work we demonstrated how this can be achieved with an ultra-scalable switching architecture reaching multi-terabits per second (10-100 Tb/s) in a single chassis. The implemented testbed uses only off-the-shelf optical and electronic components. The scalability of this architecture is the direct outcome of how global time (i.e., UTC – coordinated universal time) and pipeline forwarding are utilized. The paper presents the design of a prototype switch and experimental activity with it.

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Last updated: 2008-09-10 05:37:04